1. Field of the Invention
The present invention relates to an imaging device utilizing a CMOS (Complementary Metal Oxide Semiconductor) sensor or others, and a camera.
2. Description of the Related Art
As an example, a CMOS imaging device of Patent Document 1 (JP-A-2005-328135) converts, by pixels, any imaged object into an electric signal (pixel signal), and converts the analog electric signal into digital image data using an analog digital converter equipped in a column processing circuit.
By taking as an example the column processing circuit of the CMOS imaging device of Patent Document 1, the outline of the operation thereof is described by referring to FIG. 12.
FIG. 12 is a block diagram for illustrating the outline of the operation of the column processing circuit.
In FIG. 12, a unit pixel 200 is configured to include a photodiode (PD) 201 that converts an incoming light into a signal charge, a transfer gate (TRF) 203 for transferring the signal charge to a node ND 202, a reset gate (RET) 204 for resetting the voltage of the node ND 202 to be of a predetermined value, and an amplifier gage (AMP) 205 that amplifies the voltage of the node ND 202, for example. Note that, for the sake of simplification, FIG. 12 shows only one unit pixel 200, but in actuality, a plurality of unit pixels 200 are arranged in matrix of a predetermined array shape.
Although no detailed description is given for the operation of the unit pixel 200, the unit pixel 200 converts an incoming light into an electric signal, and the resulting electric signal is transferred by a vertical signal line 206. This electric signal is forwarded to a first input terminal of a voltage comparison section 209 over the vertical signal line 206. The voltage comparison section 209 is the one configuring an AD converter 208 in a column processing circuit 214. A digital analog converter 211 equipped in the reference signal generation section 210 generates a predetermined reference signal, e.g., voltage signal of ramp (RMP) waveform. This reference signal is forwarded to a second input terminal of the voltage comparison section 209 over a ramp signal line 212. This reference signal is generated with reference to a standard reference voltage Vref.
The voltage comparison section 209 then receives, on a pixel-array column basis, the electric signal from the unit pixel 200 and the reference signal from the reference signal generation section 210, and compares these signals in terms of voltage. When the voltages of the signals both reach the same level, the voltage comparison section 209 reverses the output voltage for output to a counter 213.
The counter 213 counts the time until the voltage comparison section 209 completes the process of such a comparison, and when the reversed voltage comes from the voltage comparison section 209, responsively stops the time counting. The counter 213 then stores the count value at the point of time as digital data, and forwards the digital data to a predetermined signal processing circuit.
As such, the column processing circuit 214 converts, for every pixel-array line, an analog pixel signal into digital image data.